Design Automation Lab

Faculty Members

Research Scope

Research in this field can largely be considered applied combinatorial optimization involving both theoretical and experimental aspects. Some of the topics currently being researched in the group are given below.

• Timing optimization: In modern integrated circuit fabrication technologies, interconnect is increasingly the dominant design constraint, particularly with respect to system performance. As a result, many fundamental issues in CAD have required re-thinking in the past few years. Topics of active research in the group general pertain to interconnect synthysis tasks such as Buffer tree construction and timing-driven routing.



• Standard cell placement: We are studying new combinatorial optimization techniques for cell placement problems. Of particular interest are search mechanisms which cover a large solution space. Such methods being studied are based on constraint relaxation and constraint imposition.



• Topological representations of non-slicing floorplans: We are studying different encoding systems of feasible placement configurations like, for instance, the sequence-pair representation, the ordered and binary trees, the bounded sliceline grid. Of particular interest is the applicability of topological representations to device-level analog placement problems.



• Memory management for real-time multidimensional signal processing: For many real-time multidimensional signal processing applications (like, for instance, video an image processing, medical imaging, artificial vision, real-time 3D rendering, advanced audio and speech coding) a very large part of the power consumption is due to the data storage and data transfer. Moreover, also the area cost is for a large part dominated by the memories. Hence, the optimization of the memory architecture is a crucial step in the design methodology for this type of applications. (see more detailed research goals)