# Easy to use Makefile Template
# John W. Yancey	07/12/1997
# copyright (c)-1997: JYancey (jyancey@acm.org)
#

CC=		gcc		# C compiler of choice
CCFLAGS=	-g -c		# C option flags
LDFLAGS=	-g -O -o	# Link option flags
DEBUG=		-DDEBUG
EXENAME=	ouput		# This is the outputted exacutable
CCSWTCH=	gnu

SCR=	file1.c file2.c		# List all files with .c extension
OBJ=	file1.o file2.o		# List all files with .o extension 

# You really don't need to change any of this information. However if you do
# make needs tabs and not spaces after the target line.

all: $(EXENAME)

$(EXENAME): $(OBJ)
	$(CC) $(DEBUG) $(LDFLAGS) $(EXENAME) $(OBJ)

$(OBJ):
	$(CC) $(DEBUG) $(CCFLAGS) $(SCR)
clean:
	rm -f core *.o

mrproper: clean
	rm -f $(EXENAME)

install:
	 
# End Makefile