This section contains information on how to represent a topology for a given net. The file formats have been designed to specify topologies which are not embedded on any routing target and topologies that are embedded on a routing target.

Topology (.topo)

Topology information for any number of nets can be specified in the .topo file. Also, each net can have multiple topologies generated by various methods. The file allows specification of arbitrary topologies (as discussed above). The format of the file is shown below:
 

    TOPOLOGY <netname> <topology_id>
      DRIVER <pin_name> <x> <y> <layed_id>
      SINKS
        <pin_name> <x> <y> <layed_id>
        .
        .
        <pin_name> <x> <y> <layed_id>
      END
      STEINERS
        <steiner_name> <x> <y> <layer_id>
        .
        .
        <steiner_name> <x> <y> <layer_id>
      END
      EDGES
        {buffer_name;} <start_name> <end_name> <width>
        {buffer_name;} <start_name> <end_name> <width>
        .
        .
        {buffer_name;} <start_name> <end_name> <width>
      END
    END

Format description

• TOPOLOGY and END mark the beginning and end of one topology instance for a given net - i.e. <topology_id> uniquely identifies a topology for a given net <netname>
• DRIVER marks the specification of a driver node for that particular topology
• SINKS marks the specification of sinks.
• <steiner_name> specifies the name of the steiner node and should be unqiue within each topology for a given net ; however, the same steiner name can occur in different topologies for the same net
• <x>,<y> specify the (x,y) location of the steiner node
• <layer_id> specifies the layer for this steiner node
• EDGES marks the beginning of an edge specification in the topology; every edge may start with a buffer, cascaded buffers are represented as cosecutive edges with zero length
• <width> gives the width of the edge in multiples of minimum wire width
• <buffer_name> specifies a buffer that is inserted at the 'start' part of the edge in the direction toward the end, if is followed by semi-colon; buffer cascading is allowed
• Note that the layer/via technology for a given edge can be inferred from the layer_id fields of its two end vertices(steiners/pins)

• <topology_id> is a unique integer representing the topology for this net
• pin and net names should comply with the name specification declared in the .sitspins section
• names of steiners should abide by the name specification rule in .sitspins section
• <layer_id> is an integer as explained in the previous sections
• <x>,<y> are integer(long) values giving the position of the steiner in micron units
• <width> is a float representing wire width in multiples of some minimum/default width

Topology Tree (.tree)

Topology tree is one of the ways to represent nonembedded topology. Current representation uses postfix traversal of binary topology tree. Leaves represent sinks, root is the driver, all other nodes are steiners.

    TOPOLOGY_TREE <netname> <topology_id>
       <pin_name> <pin_name> + ......... + <pin_name>
    END

Format description

• TOPOLOGY_TREE and END mark the beginning and ending of one topology tree instance of a net
• <pin_name> give the pin name of the node in the topology these should correspond to the names of pins in .sitspins file
• Each + represents a steiner.
• <netname> and <topology_id> uniquely identify a topology

Format specification

• pin and net names should comply with the name specification declared in the .sitspins section