Formal Methods in Concurrent and Distributed Systems
With the widespread use of distributed and concurrent systems and with
the increase in the complexity of software for such systems,
it becomes important to develop
various methods for ensuring the quality of concurrent software
systems. This project proposes various methods for automated
and semi-automated analysis and verification of concurrent and distributed
systems. In particular, the project considers methods based on temporal
logic model-checking for verification of concurrent systems.
Although model-checking has been applied fairly successfully for verification
of quite a few real-life systems, its applicability to a wider class of practical systems
has been hampered by the state explosion problem (i.e. the enormous
increase in the size of the state space). In this project, symmetry
based techniques are proposed to overcome the state explosion problem.
As part of the project, a model-checking system, called SMC (Symmetry based
Model-Checker), has been built. This system takes a concurrent program
and an incorrectness specification specified as an automaton and checks
if the program has any fair computation that is accepted by the automaton.
It is an on-the-fly model-checking system that exploits
the symmetries existing in the concurrent program to reduce
the size of the explored state space. It can be used for checking
correctness of both safety and liveness properties under different notions
of fairness. It has been used to verify the Fire-wire protocol (IEEE 1394,
serial bus protocol) and detected some bugs in it.
The project also considers research on semi-automated and fully automated
methods for verification of parameterized systems
(i.e. systems with an
arbitrary number of processes). In particular, it uses
induction based approaches for verification of liveness properties of
parameterized systems. The project developed an automated system that
checks correctness of linear networks of arbitrary size. The input to this
system consists of descriptions of three processes I,P,E and an automaton
A. It checks if all fair computations of all linear networks of the form---
process I, followed by a finite number copies of process P, followed by
process E--- satisfy the correctness specification given by A.
The system terminates giving a "yes" or "no" answer, or sometimes it may not
terminate. The system
works by automatically generating an inductive invariant.
It can be used to check both safety and liveness properties.
The project also considers customizing commercial-off-the-shelf components
to individual users. It addresses the problem of \emm{under-specification}, where an
off-the-shelf component does only what it claims to do, however, it
claims more behaviors than it actually has and that one wishes for,
some of which may render it useless. Given such an under-specified
module, we propose a method to automatically synthesize some safety
properties from it that would tame its ``bad" behaviors. The advantage
of restricting to safety properties is that they are monitorable.
The safety properties are derived using an automata-theoretic
approach. We show that, when restricting to \${\omega}-regular
languages, there is no maximal safety property. For this case we
construct a sequence of increasingly larger safety properties.
We also show how to construct an
infinite-state automata that can capture safety properties
contained in the original specifications.
Monitroing stochastic system for violations of temporal properties are also
investigated.
- Monitorability in Stochastic Dynamical Systems (with M. Zefran and Yao Feng), 23rd International Conference on Computer Aided Verifications, July 14-20, Cliff Lodge, Utah, 2011 (CAV 2011).
- Runtime Monitoring of Stochastic Cyber-Physical Systems with Hybrid State (with M. Zefran and Yao Feng),2nd International Conference on Runtime Verification (RV 2011), September 27 - September 30, 2011 San Francisco, California.
- Probabilistic Buchi Automata with Non-extremal Thresholds (with Rohit Chadha and
Mahesh Viswanathan), 12th International Conference on Verification, Model checking and Abstract Interpretation, Austin, Texas, January 23-25, 2011 (VMCAI 2011).
- Model Checking Concurrent Programs with Nondeterminism and Randomization (with Rohit Chadha and Mahesh Viswanathan), 30th International Conference on Foundations of Software Technology and Theoretical Computer Science , Chennai, India, December 15-18, 2010 (FSTTCS 2010).
- Power of Randomization in Automata on Infinite Strings (with R. Chadha and M. Viswanathan), 20th International Conference on
Concurrency Theory, Bolgna, Italy, September 2009 (CONCUR 2009).
- Monitoring the Full range of Omega-regular properties of Stochastic Systems (with Kalpana Gondi and Yogesh Patel),
Proceedings of the 10th International Conference on Verification, Model Checking and Abstract Interpretation (VMCAI2009), Savannah, Georgia, 2009.
- Monitoring Temporal Properties of Stochastic Systems
In Proceedings of International Conference on Verification, Model Checking and Abstract Interpretation. Lecture Notes in Computer Science, vol. 4905. Springer-Verlag, Berlin, Germany, 294-308, January 2008.
- On the Expressiveness and Complexity of Randomization in Finite State Monitors (with R. Chadha, M. Viswanathan),
IEEE Symposium on Logic in Computer Science (LICS'08), Pittsburgh, June, 2008.
- Verification of Object-Relational Maps, (with K. Mehra, S. Rajamani and S. Jha), Fifth IEEE Symposium on Software Engineering and
Formal Methods, London, Septemeber, 2007.
- Modelchecking Systems that employ Commutative Functions
International Conf on Verification, ModelChecking and Abstract Interpretation,
Paris, January 2005.
- Taming Interface Specifications Revised version of the papers that appeared in CONCUR 2005, August 2005.
- Checking Extended CTL Properties using Guarded Quotient Structures
IEEE International Conference on Software Engineering and Formal Methods, Beijing, October, 2004.
- Symmetry and Reduced Symmetry in Model Checking ,
ACM Transactions on Programming Languages and Systems, Vol 26, Issue 2, July 2004, pp 702-734.
- SMC: A Symmetry Based Model-checker for Verification of Liveness Properties , ACM Transactions on Software Engineering
Methodologies and Systems, July 2000.
- Using Symmetry When Model-checking under Fairness Assumptions: An
Automata Theoretic Approach (with E. A. Emerson), ACM
Transactions on Programming Languages and Systems, Vol. 19, No. 4, July 1997.
- Parameterized Verification of Linear Networks using
Automata as Invariants (with V. Gyuris), Journal of Formal Aspects of
Computing, Volume 11, Number 4 / December, 1999; Earlier version was presented at the 9th International
Conference on Computer Aided Verification, Haifa, Israel, June 1997.
- On-the-Fly Model checking under Fairness that
Exploits Symmetry (with V. Gyuris),
Journal of Formal Methods in System Design,Volume 1254, 1997;
Earlier version appeared in the International Conference on Computer Aided Verification, Haifa, Israel, June 1997.
- Symmetry and Model-checking (with E. A. Emerson), Formal Methods in System Design, 9(1/2), 1996, pp 105-130.
- Verification of a Real-life Protocol Using Symbolic Model-checking (with
V. G. Naik), 6th International Conference on Computer Aided Verification,
Stanford, California, June 1994; Also appeared in Springer-Verlag Lecture Notes
in Computer Science.
- On Model-checking for the Mu-calculus and its fragments (with E. A. Emerson and C. S. Jutla),
Journal of Theoretical Computer Science, 258(1-2): 491-522 (2001)
(Preliminary version presented at the Fifth International Conference on
Computer Aided Verification, Elounda,
Crete, Greece June 28- July 1, 1993;
Appeared in Lecture Notes in Computer Science 697, Springer-Verlag).