Here is our sample Makefile again, using a macro.
OBJECTS = data.o main.o io.o project1: $(OBJECTS) cc $(OBJECTS) -o project1 data.o: data.c data.h cc -c data.c main.o: data.h io.h main.c cc -c main.c io.o: io.h io.c cc -c io.cYou can also specify a macro's value when running make, as follows:
Last updated on Wednesday, June 21, 1995 by
Ben
Y. Yoshino
Copyright © 1995 University of Hawai`i, College of Engineering,
Computer Facility
All rights reserved.