- Part 0 is already given to you
- Part 1 (mp4) is due on Wednesday 4/9/2003
- Part 2 (mp5) is due on Wednesday 4/23/2003

For part 1 of this assignment, your group will need to write a
microprogram for the Mythsim machine for all opcodes specified below
for parts 0 or 1.
You will need to electronically turn in (via
**turnin**) your assignment using the project name of **mp4**.
Each group should only submit one copy of the assignment. Make sure
that the assignment includes the names and UIC email addresses of
all members of the group in a header comment.
Here is a working Mythsim program for part 0.

For part 2 of this assignment, your group will need to write a
microprogram must run all opcodes as specified in this write up.
You will need to electronically turn in (via
**turnin**) your assignment using the project name of **mp5**.
Each group should only submit one copy of the assignment. Make sure
that the assignment includes the names and UIC email addresses of
all members of the group in a header comment.

Here are two **mem** files, that show the machine code for the
assembly language instructions for two programs.
The first program just lists all of the operations
for part0.
The second program lists the operations to
perform an assembly langauge equivelent to **x = y + z**.

The grading for part 2 will be done as follows:

- 90% of the grade will be for writing working microcode for all of the opcodes specified.
- 5% of the grade will be for a ranking of how small your microcode is compared to the rest of the class. Note microprograms that do not get all of the opcodes working will not be elligible for this portion of the assignment.
- 5% of the grade will be for a ranking of how fast your microcode is compared to the rest of the class when running certain test program(s) designed by the instructor and TA. Note microprograms that do not get all of the opcodes working will not be elligible for this portion of the assignment.

Assignment Part | Opcode number | Name | Description |
---|---|---|---|

0 | 0 | no-op | This operation does nothing |

0 | 1 | add | Ri ← Rj + Rk
This operation will add the values from registers Rj and Rk and store the result in resiter Ri. |

0 | 2 | set register | Ri ← Const8
This operation will store in register Ri the constant value given in the last 8 bits of the instruction register. |

0 | 3 | Branch if zero | if (Rj == 0) then PC ← PR + Const4
This instruction will check if the value in register Rj is zero. If so, it will add the 4 bit constant value from the instruction register to the PC. |

0 | 4 | move | Ri ← Rj
This instruction will take the value in register Rj and store it in register Ri. |

0 | 5 | Store | Mem[Rj] ← Rk
This instruction will take a value in register Rk and store it in the computer's memory. The memory address is given by the value in register Rj. |

0 | 6 | Load | Ri ← Mem[Rj]
This instruction will take a value from the computer's memory and store it in register Ri. The memory address is given by the value in register Rj. |

0 | 7 | Subtraction | Ri ← Rj - Rk
This operation will subtract from the value in register Rj the value in register Rk and store the result in resiter Ri. |

1 | 8 | Bitwise OR | Ri ← Rj | Rk
This operation will perform a BITWISE OR (each bit position is ORed independently of the other bit positions). It will or each bit of the value in register Rj with the value in register Rk and store the result in register Ri. |

1 | 9 | Bitwise AND | Ri ← Rj & Rk
This operation will perform a BITWISE AND (each bit position is ANDed independently of the other bit positions). It will and each bit of the value in register Rj with the value in register Rk and store the result in register Ri. |

1 | 10 | Bitwise NOT | Ri ← ¬ Rj
This operation will perform a BITWISE NOT (each bit position is NOTed independently of the other bit positions). It will not (invert) each bit of the value in register Rj and store the result in register Ri. |

1 | 11 | Bitwise XOR | Ri ← Rj \305 Rk
This operation will perform a BITWISE XOR (each bit position is XORed independent of the other bit positions). It will XOR each bit of the of the value in register Rj with the corresponding bit of the valus in register Rk and store the result in register Ri. |

1 | 12 | Increment | Ri ← Rj + Const4
This operation will add to the value in regsiter Rj the sign extented value contained in the Const4 field of the instruction register and store this result in register Ri. Note the sign extention of the 4 bit constant value is automatically done by the machine. |

1 | 13 | Negation | Ri ← -Rj
This operation will change the sign on the value in register Rj
and store the result in register Ri. |

1 | 14 | Logical Left Shift | Ri ← Rj<<Rk
This operation will shift the value in register Rj to the left by the number of bits equal to the value in register Rk. The result will be stored in register Ri. The value is filled in with zeros for each bit position shifted. Note that if the value in register Rk is 8 or greater, the result will be all zeros. The value in Rk is assumed to be greater than or equal to zero. If the value in Rk is negative, do something reasonable (leave the value unshifted, set the value to zero, etc). |

2 | 15 | Logical Right Shift | Ri ← Rj>>Rk
This operation will shift the value in register Rj to the right by the number of bits equal to the value in register Rk. The result will be stored in register Ri. The value is filled in with zeros for each bit position shifted. Note that if the value in register Rk is 8 or greater, the result will be all zeros. The value in Rk is assumed to be greater than or equal to zero. If the value in Rk is negative, do something reasonable (leave the value unshifted, set the value to zero, etc). |

2 | 16 | Arithmetic Right Shift | Ri ← Rj>>Rk
This operation will shift the value in register Rj to the right
by the number of bits equal to the value in register Rk. The
result will be stored in register Ri.
The value is filled in with zeros or ones depending on the sign bit
of the original value in Rj. The |

1 | 17 | Multiplication | Ri ← Rj * Rk
This operation will multiply the value in register Rj by the value in register Rk and store the result in register Ri. Only the lower 8 bits of the result is stored in register Ri. Do not worry about overflow. |

2 | 18 | Division | Ri ← Rj / Rk
This operation will divide the value in register Rj by the value in register Rk and store the integer quotent in register Ri. |

2 | 19 | Remainder | Ri ← Rj % Rk
This operation will divide the value in register Rj by the value in register Rk and store the integer remainder in register Ri. |

1 | 20 | Branch if equal | if (Rj == Rk) then PC ← PC + Const4
If the value in register Rj is equal to the value in register Rk, it will add the 4 bit constant value from the instruction register to the program counter. |

1 | 21 | Branch if not equal | if (Rj != Rk) then PC ← PC + Const4
If the value in register Rj is not equal to the value in register Rk, it will add the 4 bit constant value from the instruction register to the program counter. |

2 | 22 | Branch if less than | if (Rj < Rk) then PC ← PC + Const4
If the value in register Rj is less than to the value in register Rk, it will add the 4 bit constant value from the instruction register to the program counter. |

2 | 23 | Branch if less than or equal | if (Rj <= Rk) then PC ← PC + Const4
If the value in register Rj is less than or equal to the value in register Rk, it will add the 4 bit constant value from the instruction register to the program counter. |

2 | 24 | Branch if greater than | if (Rj > Rk) then PC ← PC + Const4
If the value in register Rj is greater than to the value in register Rk, it will add the 4 bit constant value from the instruction register to the program counter. |

2 | 25 | Branch if greater than or equal | if (Rj >= Rk) then PC ← PC + Const4
If the value in register Rj is greater than or equal to the value in register Rk, it will add the 4 bit constant value from the instruction register to the program counter. |

2 | 26 | Branch if less than zero | if (Rj < 0) then PC ← PC + Const4
The the value in register Rj is less than zero, add the 4 bit constant value from the instruction register to the program counter. |

2 | 27 | Branch if greater than zero | if (Rj > 0) then PC ← PC + Const4
The the value in register Rj is greater than zero, add the 4 bit constant value from the instruction register to the program counter. |

2 | 28 | Branch if less than or equal to zero | if (Rj <= 0) then PC ← PC + Const4
The the value in register Rj is less than or equal to zero, add the 4 bit constant value from the instruction register to the program counter. |

2 | 29 | Branch if greater than or equal to zero | if (Rj >= 0) then PC ← PC + Const4
The the value in register Rj is greater than or equal to zero, add the 4 bit constant value from the instruction register to the program counter. |

2 | 30 | Branch if not zero | if (Rj != 0) then PC ← PC + Const4
The the value in register Rj is not equal to zero, add the 4 bit constant value from the instruction register to the program counter. |

1 | 31 | Jump with Constant | PC ← Const8
Store in the program counter (register 7) the value in the 8 bit constant field in the instruction. |

1 | 32 | Jump with Register | PC ← Rj
Store in the program counter (register 7) the value from register Rj. |

1 | 33 | Halt | Stop exectution
In Mythsim, execution is halted when the machine detects a microinstruction that does a goto to itself. The microinstruction for this is: opcode[33]: goto opcode[33]; |

2 | 34 | More to Come | More to Come |

Opcode 6 bits | Ri2 bits | Rj2 bits | Rk2 bits | Const44 bits |

Opcode 6 bits | Ri2 bits | Const8
8 bits |

Below is a table showing how to check for a comparison between to values. Remember, to compare A with B, look at the result of A - B. The comparision uses the following pieces of information:

**z**- if the result of the subtraction is zero (z is 1 if the result is zero, z is 0 if the result is not zero)**s**- the sign bit of the result (this is the m7 status line in Mythsim)**v**- if the result of the subtraction caused overflow (v is 1 if overflowed occurred, v is 0 if overflow did not occur)

Comparison Operation | equivalent to |
---|---|

A > B | !z && (s == v) |

A >= B | s == v |

A < B | s XOR v |

A >= B | z || (s XOR v) |

A == B | z |

A != B | !z |